Framework for Automatic PCB Marking Detection and Recognition for Hardware Assurance

A Bill of Materials (BoM) is a list of all components on a printed circuit board (PCB). Since BoMs are useful for hardware assurance, automatic BoM extraction (AutoBoM) is of great interest to the government and electronics industry. To achieve a high-accuracy AutoBoM process, domain knowledge of PCB text and logos must be utilized. In this study, we discuss the challenges associated with automatic PCB marking extraction and propose 1) a plan for collecting salient PCB marking data, and 2) a framework for incorporating this data for automatic PCB assurance. Given the proposed dataset plan and framework, subsequent future work, implications, and open research possibilities are detailed.Comment: 5 pages, 3 figures, Government Microcircuit Applications & Critical Technology Conference (GOMACTech) 202

PQC-SEP: Power Side-channel Evaluation Platform for Post-Quantum Cryptography Algorithms

Research in post-quantum cryptography (PQC) aims to develop cryptographic algorithms that can withstand classical and quantum attacks. The recent advance in the PQC field has gradually switched from the theory to the implementation of cryptographic algorithms on hardware platforms. In addition, the PQC standardization process of the National Institute of Standards and Technology (NIST) is currently in its third round. It specifies ease of protection against side-channel analysis (SCA) as an essential selection criterion. Following this trend, in this paper, we evaluate side-channel leakages of existing PQC implementations using PQC-SEP, a completely automated side-channel evaluation platform at both pre-and post-silicon levels. It automatically estimates the amount of side-channel leakage in the power profile of a PQC design at early design stages, i.e., RTL, gate level, and physical layout level. It also efficiently validates side-channel leakages at the post-silicon level against artificial intelligence (AI) based SCA models and traditional SCA models. Further, we delineate challenges and approaches for future research directions

Rethinking Watermark: Providing Proof of IP Ownership in Modern SoCs

Intellectual property (IP) cores are essential to creating modern system-on-chips (SoCs). Protecting the IPs deployed in modern SoCs has become more difficult as the IP houses have been established across the globe over the past three decades. The threat posed by IP piracy and overuse has been a topic of research for the past decade or so and has led to creation of a field called watermarking. IP watermarking aims of detecting unauthorized IP usage by embedding excess, nonfunctional circuitry into the SoC. Unfortunately, prior work has been built upon assumptions that cannot be met within the modern SoC design and verification processes. In this paper, we first provide an extensive overview of the current state-of-the-art IP watermarking. Then, we challenge these dated assumptions and propose a new path for future effective IP watermarking approaches suitable for today\u27s complex SoCs in which IPs are deeply embedded

Hardware Security (Dagstuhl Seminar 16202)

This report documents the program and outcomes of Dagstuhl Seminar 16202 ``Hardware Security", which was held in Schloss Dagstuhl- Leibniz Center for Informatics from May 16- 20, 2016. This seminar aims to bring together a group of researchers, who are actively involved in the design and the security assessment of hardware primitives. The seminar was organized around presentations given by several participants on their current research, and ongoing work. In addition to these presentations, the program also included three discussion sessions, and two special sessions on curriculum development and funding programs. The seminar was indeed successful in familiarizing the researchers with recent developments in hardware security field of study, providing better understanding of still unsolved problems, and pointing out future research directions. The paper is further organized as follows. Section 1 summarizes the most important goals of the seminar. Section is devoted to the abstracts of the presentations given in the seminar, whereas in Section 4 the abstracts of the discussion sessions are provided